This invention relates in general to the tuning of frequency conversion and/or synthesizer systems and more particularly to the fine tuning of such circuitry including phase locked loops (PLLs).
Modern high frequency communication systems such as transceivers or equipments for testing such systems often include frequency converter or synthesizer circuits which can perform a variety of functions. For instance, such circuitry is sometimes utilized in transceivers or test equipment to provide a selected local oscillator signal when such equipment is operated in a "receive mode" or to provide an output signal having a selected stable reference frequency for converting the frequencies of a modulated signal when such equipment is operated in a "transmit mode" or as a signal generator.
More specifically, such transceiver or test equipment systems commonly have a prior art PLL which includes a phase detector having an output coupled through a loop filter to control the frequency of a Voltage Controlled Oscillator (VCO). The output of the VCO is fed back through a divide-by-M circuit to a first input of the phase detector. A constant reference frequency signal is applied to a second input of the phase detector by a crystal oscillator, for instance. The frequency of the VCO output signal is changed in steps by changing "M" of the divide-by-M circuit in a known manner. This prior art circuitry is capable of providing M discrete frequencies which are each separated from the nearest discrete frequency by the frequency of the reference oscillator.
It is desirable for the reference frequency to have a relatively high magnitude so that the magnitude of "M" can be kept to a minimum for a given frequency band. As a result, the PLL is thereby enabled to have a relatively wide bandwidth which, inter alia, facilitates rapid changing of frequency when "M" is changed and effective elimination of noise created by the various active components in the loop.
Prior art transceiver and/or test equipment sometimes also include a "dual conversion" system having a first tunable local oscillator and first mixer for translating frequency components of a received signal either up or down so that they fall within the bandpass of a first Intermediate Frequency (IF) amplifier. The first local oscillator can include the above-described divide-by-M PLL. A second fixed local oscillator and second mixer may be utilized in a known manner to further convert the frequencies of the first IF signal to provide a second IF signal. As will subsequently be described in more detail, it is known to feedback a portion of this second fixed local oscillator signal to another mixer included in the feedback loop for the PLL of the first local oscillator which results in a desirable cancellation at the second mixer of noise created by the second local oscillator.
As described above, changing the value of "M" in the PLL provides a broad tuning control of the frequency thereof. In many applications it is also desirable to provide circuitry for enabling "fine tuning" of the frequency of the PLL output signal to cover the frequency band between each of the various discrete output frequencies of the PLL provided by tuning "M". The required fine tuning can be either continuous or in predetermined incremental steps. Having high reference frequencies complicates this "fine tuning" requirement.
One prior art double conversion system having fine tuning employs a third mixer and a third local oscillator which is tunable over a relatively small range. The third local oscillator provides adjustment in the center frequency of the signal to be processed after the signal passes through the second IF stage. Unfortunately, the addition of this third mixer and third local oscillator tends to increase the noise level of the signal and the extra components provide increased cost and increased complexity which result in decreased reliability of systems in which it is employed. Shifts in the third local oscillator frequency also produce an undesirable shift in first I.F. frequency. Other prior art techniques for providing the fine tuning function of PLLs provide still other disadvantages.
Furthermore, some prior art systems require circuitry redundant to that used for the "receive" mode to provide frequency conversion when the transceiver or test equipment is operated in the "transmit" or output signal generator mode.